MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 152

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

crorc
crxor
divw (divw. divwo divwo.)
divwu divwu. divwuo divwuo.
eieio
eqv (eqv.)
extsb (extsb.)
extsh (extsh.)
fabs (fabs.)
fadd (fadd.)
fadds (fadds.)
fcmpo
fcmpu
fctiw (fctiw.)
fctiwz (fctiwz.)
fdiv (fdiv.)
fdivs (fdivs.)
fmadd (fmadd.)
fmadds (fmadds.)
fmr (fmr.)
fmsub (fmsub.)
fmsubs (fmsubs.)
fmul (fmul.)
fmuls (fmuls.)
fnabs (fnabs.)
fneg (fneg.)
fnmadd (fnmadd.)
fnmadds (fnmadds.)
fnmsub (fnmsub.)
fnmsubs (fnmsubs.)
frsp (frsp.)
fsub (fsub.)
fsubs (fsubs.)
isync
lbz
lbzu
lbzux
lbzx
lfd
lfdu
MPC555
USER’S MANUAL
/
MPC556
Mnemonic
Table 3-19 Instruction Set Summary (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
Rev. 15 October 2000
crbD,crbA, crbB
crbD,crbA,crbB
rD,rA,rB
rD,rA,rB
rA,rS,rB
rA,rS
rA,rS
frD,frB
frD,frA,frB
frD,frA,frB
crfD,frA,frB
crfD,frA,frB
frD,frB
frD,frB
frD,frA,frB
frD,frA,frB
frD,frA,frC,frB
frD,frA,frC,frB
frD,frB
frD,frA,frC,frB
frD,frA,frC,frB
frD,frA,frC
frD,frA,frC
frD,frB
frD,frB
frD,frA,frC,frB
frD,frA,frC,frB
frD,frA,frC,frB
frD,frA,frC,frB
frD,frB
frD,frA,frB
frD,frA,frB
rD,d(rA)
rD,d(rA)
rD,rA,rB
rD,rA,rB
frD,d(rA)
frD,d(rA)
Operand Syntax
—
—
Condition Register OR with Complement
Condition Register XOR
Divide Word
Divide Word Unsigned
Enforce In-Order Execution of I/O
Equivalent
Extend Sign Byte
Extend Sign Half Word
Floating Absolute Value
Floating Add (Double-Precision)
Floating Add Single
Floating Compare Ordered
Floating Compare Unordered
Floating Convert to Integer Word
Floating Convert to Integer Word with Round to-
ward Zero
Floating Divide (Double-Precision)
Floating Divide Single
Floating Multiply-Add (Double-Precision)
Floating Multiply-Add Single
Floating Move Register
Floating Multiply-Subtract (Double-Precision)
Floating Multiply-Subtract Single
Floating Multiply (Double-Precision)
Floating Multiply Single
Floating Negative Absolute Value
Floating Negate
Floating Negative Multiply-Add (Double-Preci-
sion)
Floating Negative Multiply-Add Single
Floating Negative Multiply-Subtract (Double-
Precision)
Floating Negative Multiply-Subtract Single
Floating Round to Single
Floating Subtract (Double-Precision)
Floating Subtract Single
Instruction Synchronize
Load Byte and Zero
Load Byte and Zero with Update
Load Byte and Zero with Update Indexed
Load Byte and Zero Indexed
Load Floating-Point Double
Load Floating-Point Double with Update
Name
MOTOROLA
3-30