MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 187

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

4.3.7 Compressed Address Format – Indirect Branches
4.3.8 Compression Process
MPC555
USER’S MANUAL
An instruction in memory which will serve as the target of a branch will have a label
attached. The label provides the needed pointer to the other half of the branch target
instruction. The label token will be skipped in normal sequential operation. The label
has three parts. First, the label prefix character (which is skipped by the decompres-
sor). Second, a 5-bit pointer to the second half of the instruction. Third, a bit which in-
dicates the location of the second instruction half on the same line or the next line.
Indirect branches use the regular two pointer format described above. The indirect
branch destination address is copied without any change from one of the following reg-
isters:
See the PowerPC™
The compression process is implemented by the following steps (See
The compiler will add a few simple “hooks” to the compiled code which will make com-
pression possible. Compiled code will be generated in the “elf” format for code
Figure 4-10 Extracting Direct Branch Target Address in the Decompressor
Address
Base
• LR
• CTR
• SRR0
• User code compilation/linking
• User application code compression by software compression tool.
/
MPC556
Left Stream
0
Freescale Semiconductor, Inc.
RCPU User’s Manual,
For More Information On This Product,
Instruction Code
Label token
Go to: www.freescale.com
Rev. 15 October 2000
BURST BUFFER
11 12
Label Format
1819
RCPURM/AD, for more details.
Right Stream
Boundary Bit Field
Same / Next Line bit
Prefix Character
5-bit Pointer
30 31
1
0
0
0
1
1
0
1
0
1
1
Figure
MOTOROLA
4-11):
4-11