MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 193

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

4.5.1 Exception Table Relocation Operation
MPC555
USER’S MANUAL
When an exception is requested, the CPU initiates a fetch cycle that branches to the
exception routine associated with the exception that caused the fetch. The exception
addresses are fixed within the RCPU architecture and are 0x100 bytes apart from
each other, starting at address 0x0000_0100 or 0xFFF0_0100, depending on the val-
ue of the MSR[IP] bit.
If the relocation feature is disabled, the BBC transfers the exception fetch address to
the internal bus of the MPC555 / MPC556 with no interference.
In order to activate exception table relocation, the following steps are required:
If the relocation feature is enabled, the BBC translates the starting address of the ex-
ception routine into the address located at the lowest portion of the internal memory.
At that location, the user must insert a series (table) of consecutive branch instructions
that point to the appropriate exception routines.
Thus, the CPU branches twice to reach the appropriate exception routine.
1. Set the MSR[IP] bit. To set this bit out of reset, set the appropriate bit in the re-
2. Set the ETRE bit in BBCMCR register. See
3. Program absolute branch instructions at the locations indicated in
/
MPC556
set configuration word.
Register (BBCMCR)
pointing to the desired exception handler routines.
These branch instructions must utilize absolute addressing modes of
the RCPU (relative branches can not be used).
The eight Kbytes allocated for the exception table can be almost fully
utilized. This is possible if the MPC555 / MPC556’s address space is
not mapped to the exception address space — that is, if addresses
0xFFF0_0000 to 0xFFF0_1FFF are not part of the MPC555 /
MPC556 address space. In this case, these eight Kbytes can be fully
utilized by the compiler, except for the lower 64 words (256 bytes),
which are reserved for the exception pointers.
If the CPU issues any address that falls between two successive ex-
ception entries (e.g., 0xFFF0_0104), then an exception is generated
to the CPU if exception relocation is enabled. See
Configuration Register
Freescale Semiconductor, Inc.
For More Information On This Product,
for programming details.
Go to: www.freescale.com
Rev. 15 October 2000
BURST BUFFER
(BBCMCR).
NOTE 1
NOTE 2
NOTE
4.6.4 BBC Module Configuration
4.6.4 BBC Module
MOTOROLA
Table 4-1
4-17