MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 261

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC555LFMZP40
Manufacturer:
MOTOLOLA
Quantity:
853
Part Number:
MPC555LFMZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC555LFMZP40
Manufacturer:
MOT
Quantity:
2
Part Number:
MPC555LFMZP40R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
8.1 Overview
MPC555 / MPC556
USER’S MANUAL
The main timing reference for the MPC555 / MPC556 can monitor any of the following:
The system operating frequency is generated through a programmable phase-locked
loop, the system PLL (SPLL). The SPLL is programmable in integer multiples of the
input oscillator frequency to generate the internal (VCO/2) operating frequency. A pre-
divider before the SPLL enables the user to divide the high frequency crystal oscillator.
The SPLL VCO is twice the system frequency. The internal operating SPLL frequency
should be at least 30 MHz. It can be divided by a power-of-two divider to generate the
system operating frequencies.
In addition to the system clock, the clocks submodule provides the following:
The oscillator, TB, DEC, RTC, and the PIT are powered from the keep alive power
supply (KAPWR) pin. This allows the counters to continue to count (increment/decre-
ment) at the oscillator frequency even when the main power to the MCU is off. While
the power is off, the PIT may be used to signal to the power supply IC to enable power
to the system at specific intervals. This is the power-down wake-up feature. When the
chip is not in power-down low-power mode, the KAPWR is powered to the same volt-
age value as the voltage of the I/O buffers and logic.
The MPC555 / MPC556 clock module consists of the main crystal oscillator (OSCM),
the SPLL, the low-power divider, the clock generator, the system low-power control
block, and the limp mode control block. The clock module receives control bits from
the system clock control register (SCCR), change of lock interrupt register (COLIR),
the low-power and reset-control register (PLPRCR), and the PLL.
All of the MPC555 peripherals on the IMB bus derive its clock timing from the UIMB
module. The UIMB runs on the main system clock, but can divide the system frequen-
cy in half. See
Figure 8-1
• A crystal with a frequency of four MHz or 20 MHz
• An external frequency source with a frequency of 4 MHz
• An external frequency source at the system frequency
• TMBCLK to the time base (TB) and decrementer (DEC)
• PITRTCLK to the periodic interrupt timer (PIT) and real-time clock (RTC)
illustrates the functional block diagram of the clock unit.
12.3 Clock
CLOCKS AND POWER CONTROL
Freescale Semiconductor, Inc.
For More Information On This Product,
CLOCKS AND POWER CONTROL
Module.
Go to: www.freescale.com
Rev. 15 October 2000
SECTION 8
MOTOROLA
8-1

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