MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 283

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

8.9.3.2 Keep Alive Power Registers Lock Mechanism
MPC555
USER’S MANUAL
The MPC555 / MPC556 asserts the TEXP signal, if enabled, when the RTC or TB time
value matches the value programmed in the associated alarm register or when the PIT
or DEC value reaches zero. The TEXP signal is negated when the TEXPS status bit
is written to one.
The KAPWR power supply feeds the main crystal oscillator (OSCM). The condition for
the main crystal oscillator stability is that the power supply value changes slowly. The
maximum slope must be less than 5 mV per oscillation cycle (
The USIU timer, clocks, reset, power, decrementer, and time base registers are pow-
ered by the KAPWR supply. When the main power supply is disconnected after power-
down mode is entered, the value stored in any of these registers is preserved. If pow-
er-down mode is not entered before power disconnect, there is a chance of data loss
in these registers. To minimize the possibility of data loss, the MPC555 / MPC556 in-
cludes a key mechanism that ensures data retention as long as a register is locked.
While a register is locked, writes to this register are ignored.
Each of the registers in the KAPWR region have a key that can be in one of two states:
open or locked. At power-on reset the following keys are locked: RTC, RTSEC, RT-
/
MPC556
MPC555
Figure 8-11 External Power Supply Scheme
Freescale Semiconductor, Inc.
For More Information On This Product,
KAPWR
TEXP
VDDSYN
VDD
VDDSRAM
CLOCKS AND POWER CONTROL
Switch
Go to: www.freescale.com
Logic
Rev. 15 October 2000
O
O
O
O
SW1
SW2
3 V - 3.3 V
Backup
Supply
Power
τ
Power Supply
Main Power
VDDSRAM
> 200-300/freq
Supply
3.3 V
3.3 V
MOTOROLA
oscm
8-23
).