MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 461

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

RJURR — Right-Justified, Unsigned Result Register
LJSRR — Left-Justified, Signed Result Register
13.12.12 Result Word Table
RESET:
RESET:
MPC555
USER’S MANUAL
NOTES:
MSB
MSB
S
0
0
0
1. S = Sign bit.
1
The result word table is a 64-word long, 10-bit wide RAM. The QADC64 writes a result
word after completing an analog conversion specified by the corresponding CCW. The
result word table can be read or written, but in normal operation, software reads the
result word table to obtain analog conversions from the QADC64. Unimplemented bits
are read as zeros, and write operations have no effect.
While there is only one result word table, the data can be accessed in three different
alignment formats:
The left-justified, signed format corresponds to a half-scale, offset binary, two’s com-
plement data format. The data is routed onto the IMB according to the selected format.
The address used to access the table determines the data alignment format. All write
operations to the result word table are right-justified.
The conversion result is unsigned, right-justified data. Unused bits return zero when
read.
The conversion result is signed, left-justified data. Unused bits return zero when read.
• Right-justified, with zeros in the higher order unused bits.
• Left-justified, with the most significant bit inverted to form a sign bit, and zeros in
• Left-justified, with zeros in the unused lower order bits.
/
the unused lower order bits.
1
0
1
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
RESERVED
2
0
2
3
0
3
Freescale Semiconductor, Inc.
4
0
4
For More Information On This Product,
RESULT
5
0
5
Go to: www.freescale.com
Rev. 15 October 2000
6
6
7
7
8
8
9
9
10
10
0
RESULT
0x30 4A80 – 0x30 4AFE
0x30 4B00 – 0x30 4B7E
0x30 4E80 – 0x30 4EFE
0x30 4F00 – 0x30 4F7E
11
11
0
RESERVED
12
12
0
13
13
0
MOTOROLA
14
14
0
13-49
LSB
LSB
15
15
0