MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 566

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

15.13 MIOS 16-bit Parallel Port I/O Submodule (MPIOSM)
15.13.1 MIOS 16-bit Parallel Port I/O Submodule (MPIOSM) Registers
15.13.1.1 MPIOSM Data Register (MPIOSMDR)
MPC555
USER’S MANUAL
An MIOS 16-bit parallel port I/O submodule (MPIOSM) can handle up to 16 input/out-
put pins. Its control register is composed of two 16-bit registers: the data register (DR)
and the data direction register (DDR). Each pin of the MPIOSM may be programmed
as an input or an output under software control. The direction of a pin is determined by
the state of the corresponding bit in the DDR.
Refer to
One set of registers is associated with the MPIOSM submodule. The base addresses
of the submodules are given in the table below.
This read/write register defines the value to be driven to the pad in output mode, for
each implemented I/O pin of the MPIOSM.
/
MPC556
Table 15-36
0x30 6100
0x30 6102
0x30 6104
0x30 6106
Address
Figure 15-7 MPIOSM One-Bit Block Diagram
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
MPIOSM Data Register (MPIOSMDR)
See
MPIOSM Data Direction Register (MPIOSMDDR)
See
Reserved
Reserved
Freescale Semiconductor, Inc.
for the MPIOSM relative I/O pin implementation.
For More Information On This Product,
Table 15-25 MPIOSM Address Map
Table 15-26
Table 15-27
DIRECTION
REGISTER
REGISTER
DATA
DATA
Go to: www.freescale.com
Rev. 15 October 2000
for bit descriptions.
for bit descriptions.
Register
Output
Driver
Input
PIN
I/O
MOTOROLA
15-30