MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 639

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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Manufacturer
Quantity
Price
Part Number:
MPC555LFMZP40
Manufacturer:
MOTOLOLA
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853
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Manufacturer:
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10 000
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Manufacturer:
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Part Number:
MPC555LFMZP40R2
Manufacturer:
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17.4.16 TPU Module Configuration Register 3
TPUMCR3 — TPU Module Configuration Register 3
MPC555
USER’S MANUAL
Bit(s)
MSB
0:6
0
RESET:
7
8
9
Table 17-19 IMB Clock Frequency/Minimum Guaranteed Detected Pulse
Filter Control
TCR2PSC
1
/
EPSCKE
PWOD
MPC556
Name
FPSCK
K2
000
001
010
011
100
101
110
111
2
RESERVED
Reserved
Prescaler write-once disable bit. The PWOD bit does not lock the EPSCK field and the EPSCKE
bit.
0 = Prescaler fields in MCR are write-once
1 = Prescaler fields in MCR can be written anytime
TCR2 prescaler 2
0 = Prescaler clock source is divided by one.
1 = Prescaler clock is divided. See divider definitions in
Enhanced pre-scaler enable
0 = Disable enhanced prescaler (use standard prescaler)
1 = Enable enhanced prescaler. IMB clock will be divided by the value in EPSCK field.
3
Table 17-20 TPUMCR3 Bit Descriptions
Freescale Semiconductor, Inc.
Table 17-18 Entry Table Bank Location
Divide By
4
For More Information On This Product,
128
256
512
16
32
64
4
8
5
0
TIME PROCESSOR UNIT 3
Go to: www.freescale.com
ETBANK
Rev. 15 October 2000
6
0
00
01
10
11
PWOD
12.8 µs
25.6 µs
20 MHz
200 ns
400 ns
800 ns
1.6 µs
3.2 µs
6.4 µs
7
0
TCR2
PCK2
8
0
Description
Bank
0
1
2
3
SCKE
EP-
9
0
served
15.51 µs
33 MHz
1.94 µs
3.88 µs
7.76 µs
121 ns
242 ns
485 ns
970 ns
Re-
10
0
Table
11
0
17-4.
12
EPSCK
12.80 µs
40 MHz
1.60 µs
3.20 µs
6.40 µs
100 ns
200 ns
400 ns
800 ns
13
0x30 402A
0x30 442A
MOTOROLA
14
17-21
LSB
15

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