MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 798

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555 / MPC556
USER’S MANUAL
0x30 7080
0x30 7082
0x30 7084
0x30 7086
0x30 7088
0x30 708A
0x30 708C —
0x30 708E
0x30 7090
0x30 7092
0x30 7094
0x30 7096
0x30 7098
0x30 709A
0x30 709C —
0x30 709E
0x30 70A0
0x30 70A2
0x30 70A4
0x30 70A6
Address
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
—
—
S
T
S
TCNMCR_A
CANTCR_A
CANICR_A
CANCTRL0_A/
CANCTRL1_A
PRESDIV_A/
CTRL2_A
TIMER_A
RXGMSKHI_A
RXGMSKLO_A
RX14MSKHI_A
RX14MSKLO_A
RX15MSKHI_A
RX15MSKLO_A
ESTAT_A
IMASK_A
IFLAG_A
RXECTR_A/
TXECTR_A
Table A-11 TouCAN (CAN 2.0B Controller)
Freescale Semiconductor, Inc.
(Note: Bit descriptions apply to TouCAN_B as well)
MPC555 / MPC556 INTERNAL MEMORY MAP
For More Information On This Product,
Symbol
—
—
Go to: www.freescale.com
Rev. 15 October 2000
TouCAN_A
TouCAN_A Module Configuration Register.
See
TouCAN_A Test Register
TouCAN_A Interrupt Configuration Register.
See
TouCAN_A Control Register 0/
TouCAN_A Control Register 1.
See
descriptions.
TouCAN_A Control and Prescaler Divider
Register/
TouCAN_A Control Register 2.
See
descriptions.
TouCAN_A Free-Running Timer Register.
See
Reserved
TouCAN_A Receive Global Mask High.
See
TouCAN_A Receive Global Mask Low.
See
TouCAN_A Receive Buffer 14 Mask High.
See
ters
TouCAN_A Receive Buffer 14 Mask Low.
See
ters
TouCAN_A Receive Buffer 15 Mask High.
See
ters
TouCAN_A Receive Buffer 15 Mask Low.
See
ters
Reserved
TouCAN_A Error and Status Register.
See
TouCAN_A Interrupt Masks.
See
TouCAN_A Interrupt Flags.
See
TouCAN_A Receive Error Counter/
TouCAN_A Transmit Error Counter.
See
Table 16-11
Table 16-12
Table 16-13
Table 16-17
Table 16-19
Table 16-20
Table 16-20
16.7.10 Receive Buffer 14 Mask Regis-
16.7.10 Receive Buffer 14 Mask Regis-
16.7.11 Receive Buffer 15 Mask Regis-
16.7.11 Receive Buffer 15 Mask Regis-
Table 16-21
Table 16-24
Table 16-25
Table 16-26
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
and
and
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
Table 16-16
Table 16-18
for bit
for bit
MOTOROLA
Size
16
16
16
16
16
—
16
16
16
16
16
16
—
16
16
16
16
A-22
Re-
set
—
—
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S