AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 1096

• Manufacturer Part Number: AT91SAM9M10-CU
• Description: IC MCU 16/32BIT ARM9 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9M10-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 160
• Number Of Timers - General Purpose: 7
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.1/1.95/3.6V
• Operating Supply Voltage (min): 0.9/1.65/1.8/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

45.6.1.4
45.6.1.5
45.6.2
45.6.2.1
45.6.2.2
1096
AT91SAM9M10
LCD Controller Core
Channel-L
Control
Configuration Block
Datapath
Y_size = (LINEVAL+1)
Note:
This block has the same functionality as Channel-U, but for the Lower Panel in dual scan mode
only.
This block receives the request signals from the LCDC core and generates the requests for the
channels.
The configuration block is a set of programmable registers that are used to configure the LCDC
core operation. These registers are written via the AHB slave interface. Only word access is
allowed.
The description of the configuration registers can be found in
Interface” on page
The datapath block contains five submodules: FIFO, Serializer, Palette, Dithering and Shifter.
The structure of the datapath is shown in
• LINESIZE is the horizontal size of the display in pixels, minus 1, as programmed in the
• Bpp is the number of bits per pixel configured.
• PIXELOFF is the pixel offset for 2D addressing, as programmed in the DMA2DCFG register.
• LINEVAL is the vertical size of the display in pixels, minus 1, as programmed in the LINEVAL
LINESIZE field of the LCDFRMCFG register of the LCD Controller.
Applicable only if 2D addressing is being used.
field of the LCDFRMCFG register of the LCD Controller.
X_size is calculated as an up-rounding of a division by 32. (This can also be done adding 31 to the
dividend before using an integer division by 32). When using the 2D-addressing mode (see
Memory Addressing” on page
cuted and the FRMSIZE field programmed with every movement of the displaying window, since a
change in the PIXELOFF field can change the resulting FRMSIZE value.
1121.
1118), it is important to note that the above calculation must be exe-
Figure
45-2.
“LCD Controller (LCDC) User
6355B–ATARM–21-Jun-10
“2D