AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 1103

• Manufacturer Part Number: AT91SAM9M10-CU
• Description: IC MCU 16/32BIT ARM9 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9M10-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 160
• Number Of Timers - General Purpose: 7
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.1/1.95/3.6V
• Operating Supply Voltage (min): 0.9/1.65/1.8/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 45-13. Dithering Algorithm for Color Mode
6355B–ATARM–21-Jun-10
Frame
N+1
N+1
N+1
N+1
N+1
N+1
N+2
N+2
N+2
N+2
…
…
N
N
N
N
N
N
green_data_0
green_data_1
green_data_0
green_data_1
green_data_0
blue_data_0
blue_data_1
blue_data_0
blue_data_1
blue_data_0
red_data_0
red_data_1
red_data_0
red_data_1
red_data_0
red_data_1
Signal
…
…
Table 45-12. Dithering Algorithm for Monochrome Mode (Continued)
Consider now color display mode and two pixels p0 and p1 with the horizontal coordinates
4*n+0, and 4*n+1. A color pixel is composed of three components: {R, G, B}. Pixel p0 will be dis-
played sending the color components {R0, G0, B0} to the display. Pixel p1 will be displayed
sending the color components {R1, G1, B1}. Suppose that the data read from memory and
mapped to the lookup tables corresponds to shade level 10 for the three color components of
both pixels, with the dithering pattern to apply to all of them being DP2_3 = “1101 1011 0110”.
Table 45-13
Dual Scan Configuration, each panel data bus acts like in the equivalent single scan
configuration.)
Frame
Number
N+4
N+5
N+6
N+7
...
Shadow Level
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
…
…
shows the output sequence in the data output bus for single scan configurations. (In
Pattern
1111
1010
0101
1010
...
Bit used
…
…
3
0
3
0
3
2
1
0
3
2
2
1
3
2
2
1
Pixel a
ON
ON
OFF
ON
...
Dithering Pattern
1101
1101
1101
1101
1101
1101
1011
1011
1011
1011
1011
1011
0110
0110
0110
0110
…
…
Pixel b
ON
OFF
ON
OFF
...
4-bit LCDD
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
…
…
ON
...
Pixel c
ON
OFF
ON
AT91SAM9M10
8-bit LCDD
LCDD[7]
LCDD[6]
LCDD[5]
LCDD[4]
LCDD[3]
LCDD[2]
LCDD[7]
LCDD[6]
LCDD[5]
LCDD[4]
LCDD[3]
LCDD[2]
LCDD[7]
LCDD[6]
LCDD[5]
LCDD[4]
…
…
Pixel d
ON
OFF
ON
OFF
...
Output
G0
G1
G1
G0
R0
R1
B1
R0
B0
R1
B0
b0
g0
b1
…
…
r0
r1
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