EZ80F91NAA50SG Zilog, EZ80F91NAA50SG Datasheet - Page 26
EZ80F91NAA50SG
Manufacturer Part Number
EZ80F91NAA50SG
Description
IC ACCLAIM MCU 256KB 144BGA
Manufacturer
Zilog
Series
eZ80® AcclaimPlus!™r
Datasheet
1.EZ80F91AZA50SG.pdf
(387 pages)
Specifications of EZ80F91NAA50SG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-LBGA
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG, eZ80F910200KITG
Minimum Operating Temperature
0 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-4566
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (5Mb)
PS027001-0707
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
103
104
105
BGA
Pin No Symbol
D11
E9
D10
PB3
SCK
PB4
IC2
PB5
IC3
Function
GPIO Port B
GPIO Port B
GPIO Port B
SPI Serial
Clock
Input Capture
Input Capture
Signal Direction Description
Bidirectional with
Schmitt-trigger
input
Bidirectional with
Schmitt-trigger
input
Bidirectional with
Schmitt-trigger
input
Schmitt-trigger
input
Bidirectional with
Schmitt-trigger
input
Schmitt-trigger
input
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port B
pin, when programmed as output is
selected to be an open-drain or
open-source output.
SPI serial clock. This signal is
multiplexed with PB3.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port B
pin, when programmed as output is
selected to be an open-drain or
open-source output.
Input Capture A Signal to Timer 3.
This signal is multiplexed with PB4.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port B
pin, when programmed as output is
selected to be an open-drain or
open-source output.
Input Capture B Signal to Timer 3.
This signal is multiplexed with PB5.
Product Specification
Architectural Overview
eZ80F91 ASSP
18
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