ST10F272Z2Q3 STMicroelectronics, ST10F272Z2Q3 Datasheet - Page 37
ST10F272Z2Q3
Manufacturer Part Number
ST10F272Z2Q3
Description
MCU 16BIT 256KB FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F272Z2Q3.pdf
(189 pages)
Specifications of ST10F272Z2Q3
Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5579
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST10F272Z2Q3
Manufacturer:
E-CMOS
Quantity:
10 000
Company:
Part Number:
ST10F272Z2Q3
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST10F272Z2
5.5
5.5.1
5.5.2
Protection strategy
The protection bits are stored in Non-Volatile Flash cells inside IFLASH module, that are
read once at reset and stored in 4 Volatile registers. Before they are read from the Non-
Volatile cells, all the available protections are forced active during reset.
The protections can be programmed using the Set Protection operation (see Flash Control
Registers paragraph), that can be executed from all the internal or external memories
except from the Flash itself.
Two kind of protections are available: write protections to avoid unwanted writings and
access protections to avoid piracy. In next paragraphs all different level of protections are
shown, and architecture limitations are highlighted as well.
Protection registers
The 4 Non-Volatile Protection Registers are one time programmable for the user.
One register (FNVWPIR) is used to store the Write Protection fuses respectively for each
sector IFLASH module. The other three Registers (FNVAPR0 and FNVAPR1L/H) are used
to store the Access Protection fuses.
Flash non-volatile write protection I register
FNVWPIR (0x08 DFB0)
Table 20.
W0P(9:0)
15
Bit
14
13
Flash non-volatile write protection I register
Write Protection Bank 0 / Sectors 9-0 (IFLASH)
These bits, if programmed at 0, disable any write access to the sectors of Bank 0
(IFLASH)
12
reserved
11
10
9
NVR
8
W0P7W0P6W0P5W0P4W0P3W0P2W0P1W0P0
RW
7
Function
RW
6
RW
5
RW
4
Internal Flash memory
RW
3
Reset value: FFFFh
RW
2
RW
1
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RW
0
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