MC705P6ACDWE Freescale Semiconductor, MC705P6ACDWE Datasheet - Page 78

IC MCU 176 BYTES RAM 28-SOIC

MC705P6ACDWE

Manufacturer Part Number
MC705P6ACDWE
Description
IC MCU 176 BYTES RAM 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC705P6ACDWE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, WDT
Number Of I /o
21
Program Memory Size
4.5KB (4.5K x 8)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC705P
Core
HC05
Data Bus Width
8 bit
Data Ram Size
176 B
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
21
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Instruction Set
78
BIH rel
BIL rel
BIT #opr
BIT opr
BIT opr
BIT opr,X
BIT opr,X
BIT ,X
BLO rel
BLS rel
BMC rel
BMI rel
BMS rel
BNE rel
BPL rel
BRA rel
BRCLR n opr rel Branch if Bit n Clear
BRN rel
BRSET n opr rel Branch if Bit n Set
BSET n opr
BSR rel
CLC
CLI
Source
Form
Branch if IRQ Pin High
Branch if IRQ Pin Low
Bit Test Accumulator with Memory Byte
Branch if Lower (Same as BCS)
Branch if Lower or Same
Branch if Interrupt Mask Clear
Branch if Minus
Branch if Interrupt Mask Set
Branch if Not Equal
Branch if Plus
Branch Always
Branch Never
Set Bit n
Branch to Subroutine
Clear Carry Bit
Clear Interrupt Mask
Table 13-6. Instruction Set Summary (Sheet 2 of 6)
Operation
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
PC ← (PC) + 2 + rel ? C ∨ Z = 1 — — — — —
PC ← (PC) + 2 + rel ? IRQ = 1
PC ← (PC) + 2 + rel ? IRQ = 0
PC ← (PC) + 2 + rel ? Mn = 0
PC ← (PC) + 2 + rel ? Mn = 1
PC ← (PC) + 2 + rel ? N = 1
PC ← (PC) + 2 + rel ? N = 0
PC ← (PC) + 2 + rel ? C = 1
PC ← (PC) + 2 + rel ? Z = 0
PC ← (PC) + 2; push (PCL)
SP ← (SP) – 1; push (PCH)
PC ← (PC) + 2 + rel ? 1 = 1
PC ← (PC) + 2 + rel ? 1 = 0
PC ← (PC) + 2 + rel ? I = 0
PC ← (PC) + 2 + rel ? I = 1
PC ← (PC) + rel
Description
SP ← (SP) – 1
(A) ∧ (M)
Mn ← 1
C ← 0
I ← 0
— — — — —
— — — — —
— —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — —
— — — — —
— — — —
— — — — —
— — — — —
— — — — 0
— 0 — — —
H I N Z C
on CCR
Effect
Freescale Semiconductor
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
REL
REL
IMM
EXT
REL
REL
REL
REL
REL
REL
REL
REL
REL
REL
DIR
INH
INH
IX2
IX1
IX
AD
C5
D5
2C
2D
0D
0C
1C
2F
2E
A5
B5
E5
F5
25
23
2B
26
2A
20
01
03
05
07
09
0B
0F
21
00
02
04
06
08
0A
0E
10
12
14
16
18
1A
1E
98
9A
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
hh ll
ee ff
dd
dd
dd
dd
dd
dd
dd
dd
dd
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
ff
ii
3
3
2
3
4
5
4
3
3
3
3
3
3
3
3
3
5
5
5
5
5
5
5
5
3
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
2
2