D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 211
D13002F16V
Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13002F16V.pdf
(702 pages)
Specifications of D13002F16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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8.3.4 Data Transfer Control Registers (DTCR)
The data transfer control registers (DTCRs) are 8-bit readable/writable registers that control the
operation of the DMAC channels. A channel operates in full address mode when bits DTS2A and
DTS1A are both set to 1 in DTCRA. DTCRA and DTCRB have different functions in full address
mode.
DTCRA
DTCRA is initialized to H'00 by a reset and in standby mode.
Bit
Initial value
Read/Write
Data transfer enable
Enables or disables
data transfer
DTE
R/W
7
0
Data transfer size
Selects byte or
word size
DTSZ
R/W
6
0
Source address
increment/decrement
Source address increment/
decrement enable
These bits select whether
the source address register
(MARA) is incremented,
decremented, or held fixed
during the data transfer
SAID
R/W
5
0
195
SAIDE
R/W
Data transfer
interrupt enable
Enables or disables the
CPU interrupt at the end
of the transfer
4
0
DTIE
R/W
3
0
DTS2A
R/W
Data transfer select
2A and 1A
These bits must both be
set to 1
2
0
DTS1A
R/W
1
0
Data transfer
select 0A
Selects block
transfer mode
DTS0A
R/W
0
0
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