D12332VFC25V Renesas Electronics America, D12332VFC25V Datasheet - Page 170
D12332VFC25V
Manufacturer Part Number
D12332VFC25V
Description
IC H8S MPU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12332VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 Instruction Descriptions
2.2.43 (2)
MULXU (MULtiply eXtend as Unsigned)
Operation
ERd
Assembly-Language Format
MULXU.W Rs, ERd
Operand Size
Word
Description
This instruction multiplies the lower 16 bits of a 32-bit register ERd (destination operand) by the
contents of a 16-bit register Rs (source operand) as unsigned data and stores the result in the 32-bit
register ERd. Rs can be the upper part (Ed) or lower part (Rd) of ERd. The operation performed is
16 bits
Available Registers
ERd: ER0 to ER7
Rs:
Operand Format and Number of States Required for Execution
Note: * The number of states in the H8S/2000 CPU is 20.
Notes
Rev. 4.00 Feb 24, 2006 page 154 of 322
REJ09B0139-0400
Register direct
Addressing
Mode
R0 to R7, E0 to E7
Rs
A maximum of three additional states are required for execution of this instruction within three states
after execution of a MAC instruction. For example, if there is a one-state instruction (such as NOP)
between the MAC instruction and this instruction, this instruction will be two states longer.
The number of states may differ depending on the product. For details, refer to the relevant
microcontroller hardware manual of the product in question.
Don’t care
16 bits
MULXU (W)
ERd
16 bits
Mnemonic
MULXU.W
ERd
32 bits unsigned multiplication.
Multiplicand
Operands
Rs, ERd
1st byte
5
Multiplier
16 bits
Rs
2
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
rs
Instruction Format
—
I
0 erd
UI H
—
—
3rd byte
Product
32 bits
—
U
ERd
—
N
4th byte
—
Z
— —
V
Multiply
States
No. of
C
4*
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