DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 405

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Input Capture Function: The TCNT value can be transferred to TGR on detection of the TIOC pin input edge.
Rising edge, falling edge, or both edges can be selected as the detected edge. For channels 0, 1, 3, and 4, it is also possible
to specify another channel’s counter input clock or compare match signal as the input capture source.
Note: When another channel’s counter input clock is used as the input capture input for channels 0 and 3, ø/1 should not
Figure 10-11 shows an example of toggle output.
In this example TCNT has been designated as a periodic counter (with counter clearing performed by compare match
B), and settings have been made so that output is toggled by both compare match A and compare match B.
Example of input capture operation setting procedure
Figure 10-12 shows an example of the input capture operation setting procedure.
be selected as the counter input clock used for input capture input. Input capture will not be generated if ø/1 is
selected.
H'FFFF
TGRB
TGRA
H'0000
TIOCB
TIOCA
TCNT value
<Input capture operation>
Select input capture input
Figure 10-12 Example of Input Capture Operation Setting Procedure
Input selection
Start count
Figure 10-11 Example of Toggle Output Operation
Counter cleared by TGRB compare match
[1]
[2]
[1] Designate TGR as an input capture register by
[2] Set the CST bit in TSTR to 1 to start the count
means of TIOR, and select rising edge, falling
edge, or both edges as the input capture source
and input signal edge.
operation.
Rev.6.00 Oct.28.2004 page 375 of 1016
Toggle output
Toggle output
Time
REJ09B0138-0600H