DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 520
DF2437FV
Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of DF2437FV
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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16.6.2
Before transmitting and receiving data, first clear the TE and RE bits in SCR to 0, then initialize
the SCI as described in a sample flowchart in figure 16.15. When the operating mode, transfer
format, etc., is changed, the TE and RE bits must be cleared to 0 before making the change using
the following procedure. When the TE bit is cleared to 0, the TDRE flag in SSR is set to 1.
However, clearing the RE bit to 0 does not initialize the RDRF, PER, FER, and ORER flags in
SSR, or RDR.
Rev.2.00 May. 28, 2009 Page 480 of 732
REJ09B0059-0200
Note: In simultaneous transmit and receive operations, the TE and RE bits should both be cleared
Set TE and RE bits in SCR to 1, and
SCI Initialization (Clocked Synchronous Mode)
set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
to 0 or set to 1 simultaneously.
Set data transfer format in
(TE and RE bits are 0)
1-bit interval elapsed?
Set value in BRR
Start initialization
SMR and SCMR
<Transfer start>
Figure 16.15 Sample SCI Initialization Flowchart
Yes
Wait
No
[4]
[2]
[3]
[1]
[1] Set the clock selection in SCR. Be sure
[2] Set the data transfer format in SMR and
[3] Write a value corresponding to the bit
[4] Wait at least one bit interval, then set
to clear bits RIE, TIE, TEIE, MPIE, TE,
and RE to 0.
SCMR.
rate to BRR. This step is not necessary
if an external clock is used.
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used.
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