MC9S12XDP512MAG Freescale Semiconductor, MC9S12XDP512MAG Datasheet - Page 963
MC9S12XDP512MAG
Manufacturer Part Number
MC9S12XDP512MAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of MC9S12XDP512MAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Package
144LQFP
Family Name
HCS12
Maximum Speed
40 MHz
For Use With
DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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23.0.6.10 Module Routing Register
This register supports the re-routing of the CAN0, CAN4, SPI0, SPI1, and SPI2 pins to alternative
ports. This allows a software re-configuration of the pinouts of the different package options with
respect to above peripherals.
23.0.7
23.0.7.1
The BKGD pin is associated with the S12X_BDM and S12X_EBI modules. During reset, the
BKGD pin is used as MODC input.
23.0.7.2
Port A pins PA[7:0] and Port B pins PB[7:0] can be used for either general-purpose I/O, or, in 144-
pin packages, also with the external bus interface. In this case port A and port B are associated with
the external address bus outputs ADDR15–ADDR8 and ADDR7–ADDR0, respectively. PB0 is the
ADDR0 or UDS output.
23.0.7.3
Port C pins PC[7:0] and port D pins PD[7:0] can be used for either general-purpose I/O, or, in 144-
pin packages, also with the external bus interface. In this case port C and port D are associated with
the external data bus inputs/outputs DATA15–DATA8 and DATA7–DATA0, respectively.
These pins are configured for reduced input threshold in certain operating modes (refer to
S12X_EBI section).
of Modules
Number
5
4
3
2
1
Ports
BKGD Pin
Port A and B
Port C and D
The purpose of the module routing register is to provide maximum
flexibility for derivatives with a lower number of MSCAN and SPI
modules.
Port C and D are neither available in 112-pin nor in 80-pin packages.
CAN0
Table 23-68. Module Implementations on Derivatives
yes
yes
yes
yes
yes
CAN1
yes
yes
yes
—
—
MSCAN Modules
CAN2
yes
yes
—
—
—
NOTE
NOTE
CAN3
yes
—
—
—
—
CAN4
yes
yes
yes
yes
—
SPI0
yes
yes
yes
—
—
SPI Modules
SPI1
yes
yes
—
—
—
SPI2
yes
—
—
—
—
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