MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 58

• Manufacturer Part Number: MC68LK332ACAG16
• Description: IC MCU 32BIT LV AMASK 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68LK332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16.78MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: QSPI, SCI, UART
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.4 Parameter RAM
5.5 TPU Registers
5.5.1 System Configuration Registers
TPUMCR — TPU Module Configuration Register
STOP — Stop Bit
58
MOTOROLA
RESET:
STOP
15
0
Parameter RAM occupies 256 bytes at the top of the TPU module address map. Channel parameters
are organized as 128 16-bit words. However, only 100 words are actually implemented. The parameter
RAM address map shows how parameter words are organized in memory.
—= Not Implemented
Y = M111, where M represents the logic state of the MM bit in the SIMCR.
The TPU memory map contains three groups of registers:
0 = TPU operating normally
1 = Internal clocks shut down
14
0
TCR1P
System Configuration Registers
Channel Control and Status Registers
Development Support and Test Verification Registers
Channel
Number
13
0
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
12
0
TCR2P
Freescale Semiconductor, Inc.
Table 23 TPU Parameter RAM Address Map
11
For More Information On This Product,
0
EMU
10
0
Go to: www.freescale.com
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
$YFFFF##
Address
T2CG
9
0
Base
STF
8
0
SUPV
A0
B0
C0
D0
E0
00
10
20
30
40
50
60
70
80
90
F0
7
1
0
PSCK
A2
B2
C2
D2
E2
02
12
22
32
42
52
62
72
82
92
F2
1
6
0
A4
B4
C4
D4
E4
04
14
24
34
44
54
64
74
84
94
F4
2
Parameter Address
5
0
0
A6
B6
C6
D6
E6
06
16
26
36
46
56
66
76
86
96
F6
3
4
0
0
C8
D8
08
18
28
38
48
58
68
78
88
98
A8
B8
E8
F8
4
3
0
CA
DA
AA
BA
EA
FA
0A
1A
2A
3A
4A
5A
6A
7A
8A
9A
5
0
MC68332TS/D
IARB
EC
FC
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
0
$YFFE00
MC68332
EE
FE
—
—
—
—
—
—
—
—
—
—
—
—
—
—
7
0
0