DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1183

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.1.9
PEIORL and PEIORH are 16-bit readable/writable registers that are used to set the pins on port E
as inputs or outputs. PE21IOR to PE0IOR correspond to pins PE21 to PE0 (names of multiplexed
pins are here given as port names and pin numbers alone). PEIORL is enabled when the port E
pins are functioning as general-purpose inputs/outputs (PE15 to PE0) and the TIOC pin is
functioning as inputs/outputs of MTU2. In other states, PEIORL is disabled. PEIORH is enabled
when the port E pins are functioning as general-purpose inputs/outputs (PE21 to PE16), and the
TIOC pin is functioning as inputs/outputs of MTU2S. In other states, PEIORH is disabled.
A given pin on port E will be an output pin if the corresponding bit in PEIORH or PEIORL is set
to 1, and an input pin if the bit is cleared to 0.
However, bits 11, 9, and 5 of PEIORH and PEIORL are disabled in SH7083. PEIORH is disabled
in SH7084/SH7085. Bits 15 to 6 of PEIORH are reserved. These bits are always read as 0. The
write value should always be 0.
The initial values of PEIORL and PEIORH are H'0000, respectively.
• Port E I/O Register H (PEIORH)
Initial value:
• Port E I/O Register L (PEIORL)
Initial value:
R/W:
R/W:
Bit:
Bit:
PE15
R/W
Port E I/O Registers L, H (PEIORL, PEIORH)
IOR
15
15
R
0
0
-
PE14
R/W
IOR
14
14
R
0
0
-
PE13
R/W
IOR
13
13
R
0
0
-
PE12
R/W
IOR
12
12
R
0
0
-
PE11
R/W
IOR
11
11
R
0
0
-
PE10
R/W
IOR
10
10
R
0
0
-
R/W
PE9
IOR
R
9
0
9
0
-
R/W
PE8
IOR
R
8
0
8
0
-
R/W
PE7
IOR
R
7
0
7
0
-
Rev. 3.00 May 17, 2007 Page 1125 of 1582
R/W
PE6
IOR
R
6
0
6
0
Section 21 Pin Function Controller (PFC)
-
PE21
R/W
R/W
PE5
IOR
IOR
5
0
5
0
PE20
R/W
R/W
IOR
PE4
IOR
4
0
4
0
PE19
R/W
R/W
PE3
IOR
IOR
3
0
3
0
REJ09B0181-0300
PE18
R/W
R/W
PE2
IOR
IOR
2
0
2
0
PE17
R/W
R/W
IOR
PE1
IOR
1
0
1
0
PE16
R/W
R/W
PE0
IOR
IOR
0
0
0
0

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