M30853FHFP#U5 Renesas Electronics America, M30853FHFP#U5 Datasheet - Page 425
M30853FHFP#U5
Manufacturer Part Number
M30853FHFP#U5
Description
IC M32C MCU FLASH 384K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30853FHFP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FHFP#U5M30853FHFP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30853FHFP#U5M30853FHFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
R
R
e
E
3
. v
J
2
Figure 25.5 FMR1 Register
0
C
1
9
0 .
8 /
B
0
3
25.3.3.1 FMR00 Bit
25.3.3.2 FMR01 Bit
5
25.3.3.3 FMR02 Bit
0
The FMR00 bit indicates the flash memory operating state. It is set to "0" while the program, block
erase, erase all unlocked block, lock bit program, or read lock bit status command is being executed;
otherwise, it is set to "1".
The microcomputer can accept commands when the FMR01 bit is set to "1" (CPU rewrite mode). Set
the FMR05 bit to "1" (user ROM area access) as well if in boot mode.
The lock bit is invalid by setting the FMR02 bit to "1" (lock bit disabled). (Refer to 25.3.6 Data Protect
Function.) The lock bit is valid by setting the FMR02 bit to "0" (lock bit enabled).
The FMR02 bit does not change the lock bit status but disables the lock bit function. If the block erase
or erase all unlocked block command is executed when the FMR02 bit is set to "1", the lock bit status
changes "0" (locked) to "1" (unlocked) after command execution is completed.
3
G
J
7
u
o r
0 -
. l
Flash Memory Control Register 1
b7
0
u
0
1
NOTES:
p
, 1
0
3
b6
1. Set the FMR11 bit to "1" in 8-bit unit immediately after setting it first to "0" while the FMR01 bit is set to "1".
(
2
M
0
Do not generate an interrupt or a DMA transfer between setting the FMR11 bit to "0" and setting it to "1".
Set it while the NMI pin is held "H".
If the FMR01 bit is set to "0", the FMR01 bit and FMR11 bit are both set to "0".
0
b5
3
0
2
5
C
b4
0
8 /
Page 400
b3
, 5
b2
M
3
b1
2
C
f o
b0
8 /
4
5
(b3 - b2)
(b5 - b4)
9
) T
Symbol
FMR11
FMR16
4
(b0)
(b7)
Bit
Symbol
FMR1
Reserved Bit
EW Mode Select Bit
Reserved Bit
Reserved Bit
Lock Bit Status Flag
Reserved Bit
Bit Name
Address
0055
(1)
16
When read,
its content is indeterminate
0 : EW mode 0
1 : EW mode 1
When read,
its content is indeterminate
Set to "0"
0 : Locked
1 : Unlocked
Set to "0"
Function
After Reset
0000 0101
25. Flash Memory Version
2
RW
RW
RW
RW
RO
RO
RO
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