HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 348
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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10.9
The port output enable (POE) can be used to establish a high-impedance state for high-current
pins, by changing the POE0–POE3 pin input, depending on the output status of the high-current
pins (PE9/TIOC3B, PE11/TIOC3D, PE12/TIOC4A, PE13/TIOC4B/MRES, PE14/TIOC4C,
PE15/TIOC4D/IRQOUT). It can also simultaneously generate interrupt requests.
The high-current pins also become high-impedance regardless of whether these pin functions are
selected in cases such as when the oscillator stops or in standby mode.
10.9.1
• Each of the POE0–POE3 input pins can be set for falling edge, Pφ/8 × 16, Pφ/16 × 16, or
• High-current pins can be set to high-impedance state by POE0–POE3 pin falling-edge or low-
• High-current pins can be set to high-impedance state when the high-current pin output levels
• Interrupts can be generated by input-level sampling or output-level comparison results.
Rev. 2.00, 09/04, page 306 of 720
Pφ/128 × 16 low-level sampling.
level sampling.
are compared and simultaneous low-level output continues for one cycle or more.
Port Output Enable (POE)
Features
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