HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 352
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Current page: 352 of 766
- Download datasheet (5Mb)
Rev. 2.00, 09/04, page 310 of 720
Bit
11 to 9
8
7
6
5
4
3
2
Bit Name
POE3M1
POE3M0
POE2M1
POE2M0
POE1M1
POE1M0
PIE
Initial
value
All 0
0
0
0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. These bits should always
be written with 0
Port Interrupt Enable
This bit enables/disables interrupt requests when any of
the POE0F to POE3F bits of the ICSR1 are set to 1
0: Interrupt requests disabled
1: Interrupt requests enabled
POE3 mode 1, 0
These bits select the input mode of the POE3 pin
00: Accept request on falling edge of POE3 input
01: Accept request when POE3 input has been sampled
10: Accept request when POE3 input has been sampled
11: Accept request when POE3 input has been sampled
POE2 mode 1, 0
These bits select the input mode of the POE2 pin
00: Accept request on falling edge of POE2 input
01: Accept request when POE2 input has been sampled
10: Accept request when POE2 input has been sampled
11: Accept request when POE2 input has been sampled
POE1 mode 1, 0
These bits select the input mode of the POE1 pin
00: Accept request on falling edge of POE1 input
01: Accept request when POE1 input has been sampled
10: Accept request when POE1 input has been sampled
11: Accept request when POE1 input has been sampled
for 16 Pφ/8 clock pulses, and all are low level.
for 16 Pφ/16 clock pulses, and all are low level.
for 16 Pφ/128 clock pulses, and all are low level.
for 16 Pφ/8 clock pulses, and all are low level.
for 16 Pφ/16 clock pulses, and all are low level.
for 16 Pφ/128 clock pulses, and all are low level.
for 16 Pφ/8 clock pulses, and all are low level.
for 16 Pφ/16 clock pulses, and all are low level.
for 16 Pφ/128 clock pulses, and all are low level.
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