MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1002

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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READI Module
24.7.6
The READI reset configuration information is received via EVTI and MDI0 to enable or disable the
READI module and select the port size. EVTI and MDI0 are sampled synchronously at the negation of
RSTI. Reset configuration information must be valid on EVTI and MDI0 at least four clocks prior to the
negation of RSTI.
If EVTI is sampled asserted at negation of RSTI, the READI module will be enabled. This is illustrated in
Figure
READI control and status information will be reset and the auxiliary output port will be three-stated, when
RSTI is asserted. System reset will not reset the READI control and status information and not three-state
the auxiliary output port.
Port size configuration is selected via the value of MDI0 at the negation of RSTI.
the READI reset configuration options.
RSTI has a pull-down resistor in the pads. If the auxiliary port is not connected to a tool, READI module
will be in reset state and not drive the auxiliary output port.
24-34
System
Clock
RSTI
EVTI
24-15.
READI Reset Configuration
Reset configuration information must be valid on EVTI
at least 4 system clocks prior to RSTI negation.
EVTI
1
0
0
Table 24-25. READI Reset Configuration Options
MDI [0]
MPC561/MPC563 Reference Manual, Rev. 1.2
X
1
0
Figure 24-15. READI Module Enabled
Module Enabled, Default Full Port Configuration
Module Enabled, Reduced Port Configuration
Module Disabled. All outputs three-stated.
EVTI is sampled at the negation of RSTI. Because EVTI is
asserted, the READI module is enabled.
Configuration
2 MDI, 8 MDO
1 MDI, 2 MDO
Table 24-25
Freescale Semiconductor
describes

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