MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1022

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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READI Module
24.9.2.4
The data write synchronization message has the following format:
24.9.2.5
The data read synchronization message has the following format:
24.9.2.6
Refer to
24.9.3
A program/data/ownership trace overrun error or data trace error occurs when a trace message cannot be
queued due to the queue being full, provided data trace is enabled.
The overrun error causes the message queue to be flushed, and an error message to be queued. The error
code within the error message indicates that a program/data/ownership trace overrun error has occurred.
The next DTM will be a synchronization message. Refer to
The error message has the following format:
24.9.4
Data trace is performed by snooping the L-bus for read or write cycles. Data trace functions are enabled
by setting the appropriate fields in the DC register and the DTA registers. For details on field configuration,
24-54
TCODE (13)
TCODE (14)
Section 24.9.2.6, “Relative
[6 bits]
[6 bits]
Queue Overflow Data Trace Error Message
Data Trace Operation
Data Write Synchronization Message
Data Read Synchronization Messaging
Relative Addressing
Figure 24-46. Data Write Synchronization Message Format
Figure 24-47. Data Read Synchronization Message Format
Figure 24-48. Error Message (Queue Overflow) Format
Messages Cancelled
Messages Cancelled
Max Length = 64 bits
Max Length = 64 bits
Min Length = 16 bits
Min Length = 16 bits
MPC561/MPC563 Reference Manual, Rev. 1.2
TCODE (8)
Addressing,” for further details.
[6 bits]
[1 bit]
[1 bit]
Length = 11 bits
Error Code (0b0 0000,
0b0 0001, 0b0 0010,
0b0 0111)
[5 bits]
Full target address
Full target address
Table
[1 to 25 bits]
[1 to 25 bits]
24-20.
[8, 16, or 32 bits]
[8, 16, or 32 bits]
Data Value
Data Value
Freescale Semiconductor

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