MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1114

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Internal Memory Map
B-4
0x2F A000
0x2F A004
SPR 529
SPR 536
SPR 560
SPR 568
SPR 630
SPR 638
SPR 784 –
787
SPR 792 –
795
SPR 816 –
819
SPR 824 –
827
0x00 0000 —
0x07 FFFF
0x2F 8000 —
0x2F 87FF
Address
Address
Address
Address
S (read only)
Access
Access
Access
Access
S
S
S
S
S
S
S
S
S
S
U,S
U,S
S
Table B-1. SPR (Special Purpose Registers) (continued)
1
Table B-4. BBC (Burst Buffer Controller Module)
L2U_RBAx
L2U_MCR
L2U_GRA
BBCMCR
MI_RBAx
L2U_RAx
EIBADR
Symbol
MI_RAx
DECRAM
DPDR
IMMR
Symbol
Symbol
Symbol
MPC561/MPC563 Reference Manual, Rev. 1.2
DCCR0
DCCR1
UC3F
Table B-3. DECRAM SRAM Array
Table B-2. UC3F Flash Array
External Interrupt Relocation Table Base
Address Register
See
L2U Global Region Attribute Register
See
BBC Module Configuration Register
See
L2U Module Configuration Register
See
Development Port Data Register
See
Internal Memory Mapping Register
See
MI Region x Base Address Register
See
L2U Region x Base Address Register
See
MI Region x Attribute Register
See
L2U Region x Attribute Register
See
UC3F Flash Array
DECRAM SRAM
Decompressor Class Configuration Register
See
Decompressor Class Configuration Register
See
Table 4-9
Table 11-10
Table 4-4
Table 11-7
Section 23.4.6
Table 6-12
Table 4-5
Table 11-8
Table 4-6
Table 11-9
Table A-3
Table A-3
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
Register
Register
for bit descriptions.
Register
Freescale Semiconductor
Size
32
32
32
32
32
32
32
32
32
32
Size
Size
32
32
Size
32
32
Reset
Reset
Reset
Reset
H
H

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