MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 128

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Signal Descriptions
2.5.2
The MPC561/MPC563 has a 10 pin BDM port. See
The BDM mode is entered by the following sequence of events:
BDM mode is exited by:
2.5.3
The READI module signals support the Nexus (IEEE-ISTO 5001-1999) auxiliary port interface for debug.
There are two modes available: full port mode and reduced port mode. Reduced port mode allows for a 1
bit input stream and a 2 bit output stream. Full port mode allows for a 2-bit input stream and an 8-bit output
stream. If MDI0 is held high when Nexus mode is enabled, full port mode will be used during Nexus
debug. If MDI0 is held low when Nexus mode is enabled, reduced port mode will be used. See
for Nexus mode selection.
The Nexus interface is entered by the following sequence of events:
2-30
PORESET/TRST
JCOMP/RSTI
JCOMP/RSTI
Hold DSCK high at reset negation (SRESET)
Configure DSDI to select BDM clock mode, within 8 clocks of reset negation
Reset the device by asserting PORESET/TRST or HRESET
Hold JCOMP/RSTI low while negating PORESET/TRST
Hold TMS/EVTI low to enable Nexus mode and configure TDI/DSDI/MDI0 for full or reduced
port mode. Both of these should be done at least 4 clocks before driving JCOMP/RSTI high
TMS/EVTI
SRESET
BDM Mode Selection
Nexus Mode Selection
DSCK
DSDI
(low)
(low)
BDM Enable
JTAG Config
Figure 2-4. Debug Mode Selection (JTAG)
Figure 2-5. Debug Mode Selection (BDM)
MPC561/MPC563 Reference Manual, Rev. 1.2
JTAG On
Configure BDM
Enable Nexus
Figure 2-5
for BDM mode selection.
JTAG Disabled
BDM On
Nexus Off
T
Freescale Semiconductor
T
Figure 2-6

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