MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 28

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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21.3.8
21.3.8.1
21.3.8.2
21.3.8.3
21.3.9
21.3.10
21.3.11
21.3.11.1
21.3.11.2
21.3.11.3
21.3.11.4
21.3.12
22.1
22.2
22.3
22.4
22.4.1
22.4.2
22.4.2.1
22.4.3
22.4.4
22.4.5
22.4.6
22.4.6.1
22.4.6.2
22.4.6.3
22.4.6.4
22.5
22.5.1
22.5.2
22.5.3
22.5.4
Freescale Semiconductor
Paragraph
Number
Features ......................................................................................................................... 22-1
CALRAM Block Diagram ............................................................................................ 22-2
CALRAM Memory Map .............................................................................................. 22-2
Modes of Operation ...................................................................................................... 22-4
Programming Model ................................................................................................... 22-12
Erasing .................................................................................................................... 21-25
Stop Operation ........................................................................................................ 21-28
Disabled .................................................................................................................. 21-29
Censored Accesses and Non-Censored Accesses ................................................... 21-29
Background Debug Mode or Freeze Operation ...................................................... 21-34
Reset .......................................................................................................................... 22-5
One-Cycle Mode ....................................................................................................... 22-5
Two-Cycle Mode ...................................................................................................... 22-5
Stop Operation .......................................................................................................... 22-6
CALRAM Module Configuration Register (CRAMMCR) .................................... 22-13
CALRAM Region Base Address Registers (CRAM_RBAx) ................................ 22-15
CALRAM Overlay Configuration Register (CRAM_OVLCR) ............................. 22-17
CALRAM Ownership Trace Register (CRAM_OTR) ........................................... 22-17
Standby Operation/Keep-Alive Power .................................................................... 22-5
Overlay Mode Operation ......................................................................................... 22-6
Erase Sequence ................................................................................................... 21-26
Erasing Shadow Information Words .................................................................. 21-28
Erase Suspend ..................................................................................................... 21-28
Setting and Clearing Censor ............................................................................... 21-31
Setting Censor ..................................................................................................... 21-32
Clearing Censor .................................................................................................. 21-32
Switching The UC3F EEPROM Censorship ...................................................... 21-33
CALRAM Access/Privilege Violations ................................................................ 22-5
Overlay Mode Configuration ................................................................................ 22-6
Priority of Overlay Regions ................................................................................ 22-11
Normal (Non-Overlay) Access to Overlay Regions ........................................... 22-12
Calibration Write Cycle Flow ............................................................................. 22-12
MPC561/MPC563 Reference Manual, Rev. 1.2
CALRAM Operation
Contents
Chapter 22
Title
Number
Page
xxviii

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