MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 344

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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External Bus Interface
9-4
.
Reservation transfer
Program trace
Signal Name
Burst transfer
Address type
Address bus
Transfer size
ADDR[8:31]
Read/write
TSIZ[0:1]
RD/WR
BURST
AT[0:3]
RSV
PTR
[8:31]
Pins
24
1
1
2
3
1
1
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 9-1. MPC561/MPC563 BIU Signals
Active
Address and Transfer Attributes
HIgh
High
High
High
High
Low
Low
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Specifies the physical address of the bus transaction.
Driven by an external bus master when it owns the
external bus. An input for testing purposes only.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Driven high
indicates that a read access is in progress. Driven low
indicates that a write access is in progress.
Driven by an external master when it owns the
external bus. Driven high indicates that a read access
is in progress. Driven low indicates that a write access
is in progress.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Driven low
indicates that a burst transfer is in progress. Driven
high indicates that the current transfer is not a burst.
Driven by an external master when it owns the
external bus. Driven low indicates that a burst transfer
is in progress. Driven high indicates that the current
transfer is not a burst. The MPC561/MPC563 does
not support burst accesses to internal slaves.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Specifies the
data transfer size for the transaction.
Driven by an external master when it owns the
external bus. Specifies the data transfer size for the
transaction.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Indicates
additional type on the current transaction.
Only for testing purposes.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Indicates
additional information about the address on the
current transaction.
Only for testing purposes.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Indicates
additional information about the address on the
current transaction.
Only for testing purposes.
Description
Freescale Semiconductor

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