MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 721

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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16.7.2
CANTCR — TouCAN Test Configuration Register0x30 7082, 0x30 7482, 0x30 7882
This register is used for factory test only.
16.7.3
16.7.4
Freescale Semiconductor
SRESET
10:15
SRESET
Bits
0:4
5:7
8:9
Field
Addr
Field BOFFMSK ERRMSK
Addr
TouCAN Test Configuration Register
TouCAN Interrupt Configuration Register (CANICR)
Control Register 0 (CANCTRL0)
MSB
0
MSB
0
Name
ILBS
IRL
1
Figure 16-10. TouCAN Interrupt Configuration Register (CANICR)
0x30 7086 (CANCTRL0_A); 0x30 7486 (CANCTRL0_B); 0x30 7886 (CANCTRL0_C)
Reserved
Interrupt request level. When the TouCAN generates an interrupt request, this field
determines which of the interrupt request signals is asserted.
Interrupt level byte select. This field selects one of four time-multiplexed slots during which
the interrupt request is asserted. The ILBS and IRL fields together select one of 32 effective
interrupt levels.
00 Levels 0 to7
01 Levels 8 to 15
10 Levels 16 to 23
11 Levels 24 to 31
Reserved
2
0x30 7084 (CANICR_A); 0x30 7484 (CANICR_B); 0x30 7884 (CANICR_C)
1
Figure 16-11. Control Register 0 (CANCTRL0)
3
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 16-12. CANICR Bit Descriptions
0000_0000_00
4
2
3
5
RXMODE
IRL
4
6
0000_0000_0000_0000
5
7
Description
TXMODE
8
6
ILBS
9
7
10
8
9
11
10
00_1111
CANCTRL1
12
CAN 2.0B Controller Module
11
13
12
13
14
14
LSB
15
LSB
15
16-27

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