MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 735

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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17.2
The basic features of the MIOS14 are as follows:
Freescale Semiconductor
Modular architecture at the silicon implementation level
Disable capability in each submodule to allow power saving when its function is not needed
Six 16-bit counter buses to allow action submodules to use counter data
When not used for timing functions, every channel signal can be used as a port signal: I/O, output
only or input only, depending on the channel function.
Submodules’ signal status bits reflect the status of the signal
MIOS14 counter prescaler submodule (MCPSM):
— Centralized counter clock generator
— Programmable 4-bit modulus down-counter
— Wide range of possible division ratios: 2 through 16
— Count inhibit under software control
MIOS14 modulus counter submodule (MMCSM):
— Programmable 16-bit modulus up-counter with built-in programmable 8-bit prescaler clocked
— Maximum increment frequency of the counter:
— Flag setting and possible interrupt generation on overflow of the up-counter
— Time counter on internal clock with interrupt capability after a pre-determined time
— Optional signal usable as an external event counter (pulse accumulator) with overflow and
— Usable as a regular free-running up-counter
— Capable of driving a dedicated 16-bit counter bus to provide timing information to action
— Optional signal to externally force a load to the counter with modulus value
MIOS14 double action submodule (MDASM):
— Versatile 16-bit dual action unit allowing two events to occur before software intervention is
— Six software selectable modes allowing the MDASM to perform pulse width and period
— Software selection of one of the six possible 16-bit counter buses used for timing operations
— Flag setting and possible interrupt generation after MDASM action completion
— Software selection of output pulse polarity
— Software selection of totem-pole or open-drain output
— Software readable output signal status
MIOS14 Key Features
by MCPSM output.
– Clocked by the internal MCPSM output: f
– Clocked by the external signal: f
interrupt capability after a pre-determined number of external events.
submodules (the value driven is the contents of the 16-bit up-counter register)
required
measurements, PWM generation, single input capture and output compare operations as well
as port functions
MPC561/MPC563 Reference Manual, Rev. 1.2
SYS
/ 4
SYS
/ 2
Modular Input/Output Subsystem (MIOS14)
17-3

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