PIC12F615-E/MF Microchip Technology, PIC12F615-E/MF Datasheet - Page 113
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PIC12F615-E/MF
Manufacturer Part Number
PIC12F615-E/MF
Description
IC PIC MCU FLASH 1KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(26 pages)
3.PIC12F609T-ISN.pdf
(8 pages)
4.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F615-E/MF
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-DFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F615-EMF PDF datasheet #4
- Current page: 113 of 196
- Download datasheet (3Mb)
FIGURE 11-9:
11.8
If
programmed, the on-chip program memory can be
read out using ICSP
11.9
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are
readable and writable during Program/Verify mode.
Only the Least Significant 7 bits of the ID locations are
used.
© 2008 Microchip Technology Inc.
Instruction Flow
(INTCON reg.)
(INTCON reg.)
Note:
Instruction
Fetched
Instruction
Executed
the
CLKOUT
Note 1:
INTF flag
INT pin
GIE bit
OSC1
Code Protection
ID Locations
code
PC
2:
3:
4:
(4)
The entire Flash program memory will be
erased when the code protection is turned
off.
Specification
information.
XT, HS or LP Oscillator mode assumed.
T
GIE = ‘1’ assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = ‘0’, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
OST
protection
Inst(PC – 1)
See
= 1024 T
PC
™
WAKE-UP FROM SLEEP THROUGH INTERRUPT
for verification purposes.
OSC
the
(DS41204)
(drawing not to scale). This delay does not apply to EC, INTOSC and RC Oscillator modes.
bit(s)
Inst(PC + 1)
Sleep
MemoryProgramming
PC + 1
have
for
Processor in
PIC12F609/615/12HV609/615
not
Sleep
more
PC + 2
been
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
PC + 2
(3)
Dummy Cycle
PC + 2
Dummy Cycle
Inst(0004h)
0004h
DS41302B-page 111
Inst(0005h)
Inst(0004h)
0005h
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