PIC12CE518-04I/SN Microchip Technology, PIC12CE518-04I/SN Datasheet - Page 253
PIC12CE518-04I/SN
Manufacturer Part Number
PIC12CE518-04I/SN
Description
IC MCU OTP 512X12 W/EE 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE518-04I/SN
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
For Use With
309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 253 of 688
- Download datasheet (3Mb)
16.2
1997 Microchip Technology Inc.
Control Registers
bit 7:6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Register 16-1: SSPSTAT: Synchronous Serial Port Status Register
bit 7
Unimplemented: Read as '0'
D/A: Data/Address bit (I
1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address
P: Stop bit
(I
1 = Indicates that a stop bit has been detected last (this bit is '0' on RESET)
0 = Stop bit was not detected last
S: Start bit
(I
1 = Indicates that a start bit has been detected last (this bit is '0' on RESET)
0 = Start bit was not detected last
R/W: Read/Write bit information (I
This bit holds the R/W bit information following the last address match. This bit is only valid from
the address match to the next start bit, stop bit, or not ACK bit.
1 = Read
0 = Write
UA: Update Address (10-bit I
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
BF: Buffer Full Status bit
Receive (SPI and I
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
Transmit (I
1 = Transmit in progress, SSPBUF is full
0 = Transmit complete, SSPBUF is empty
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
2
2
C mode only. This bit is cleared when the SSP module is disabled)
C mode only. This bit is cleared when the SSP module is disabled)
U-0
—
2
C mode only)
U-0
—
2
C modes)
2
C mode only)
W = Writable bit
R-0
D/A
2
C mode only)
2
C mode only)
R-0
P
Section 16. BSSP
- n = Value at POR reset
R-0
S
R/W
R-0
DS31016A-page 16-3
R-0
UA
bit 0
R-0
BF
16
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