PIC16F688-E/ST Microchip Technology, PIC16F688-E/ST Datasheet - Page 126
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PIC16F688-E/ST
Manufacturer Part Number
PIC16F688-E/ST
Description
IC MCU FLASH 4KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
6.PIC16F688-EP.pdf
(174 pages)
Specifications of PIC16F688-E/ST
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
256 B
Height
0.9 mm
Length
5 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
4.4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F688
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41203B-page 124
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
Move W to f
[ label ]
0
(W)
None
Move data from W register to
register ‘f’.
1
1
Before Instruction
After Instruction
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
MOVWF
f
00
[0,1]
f
k
127
127
(f)
255
OPTION =
W
OPTION =
W
IORWF
MOVWF
IORLW k
OPTION
0000
(W)
(destination)
=
=
f,d
1fff
f
0xFF
0x4F
0x4F
0x4F
ffff
Preliminary
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Move Literal to W
[ label ]
0
k
None
The eight bit literal ‘k’ is loaded
into W register. The don’t cares
will assemble as 0’s
1
1
After Instruction
No Operation
[ label ]
None
No operation
None
No operation.
1
1
MOVLW
NOP
11
00
k
2004 Microchip Technology Inc.
(W)
255
W
MOVLW k
NOP
0x5A
00xx
0000
=
0x5A
kkkk
0xx0
.
kkkk
0000