PIC16F688-E/ST Microchip Technology, PIC16F688-E/ST Datasheet - Page 72
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PIC16F688-E/ST
Manufacturer Part Number
PIC16F688-E/ST
Description
IC MCU FLASH 4KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
6.PIC16F688-EP.pdf
(174 pages)
Specifications of PIC16F688-E/ST
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
256 B
Height
0.9 mm
Length
5 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
4.4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F688
8.4
A device Reset forces all registers to their Reset state.
Thus, the A/D module is turned off and any pending
conversion
registers are unchanged.
TABLE 8-2:
DS41203B-page 70
05h/
105h
07h/
107h
0Bh/
8Bh
0Ch
1Eh
1Fh
85h/
185h
87h/
187h
8Ch
91h
9Eh
9Fh
Legend:
Addr
PORTA
PORTC
INTCON
PIR1
ADRESH
ADCON0
TRISA
TRISC
PIE1
ANSEL
ADRESL
ADCON1
Effects of Reset
Name
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for A/D module.
is
Most Significant 8 bits of the left shifted A/D result or 2 bits of the right shifted result
Least Significant 2 bits of the left shifted A/D result or 8 bits of the right shifted result
aborted.
SUMMARY OF A/D REGISTERS
ADFM
ANS7
EEIE
Bit 7
EEIF
GIE
—
—
—
—
—
ADCS2
VCFG
ANS6
PEIE
ADIF
ADIE
The
Bit 6
—
—
—
—
ADRESH:ADRESL
TRISA5
TRISC5
ADCS1
ANS5
RCIF
RCIE
Bit 5
T0IE
RA5
RC5
—
TRISA4
TRISC4
ADCS0
CHS2
ANS4
INTE
C2IE
Bit 4
C2IF
RA4
RC4
Preliminary
TRISA3
TRISC3
CHS1
ANS3
RAIE
Bit 3
C1IF
C1IE
RC3
RA3
—
TRISA2
TRISC2
OSFIF
OSFIE
CHS0
ANS2
Bit 2
T0IF
RA2
RC2
—
GO/DONE
TRISA1
TRISC1
ANS1
INTF
TXIE
Bit 1
TXIF
RA1
RC1
—
TMR1IE
TMR1IF
TRISA0
TRISC0
ADON
ANS0
RAIF
Bit 0
RA0
RC0
2004 Microchip Technology Inc.
—
--xx xxxx
--xx xxxx
0000 0000
0000 0000
xxxx xxxx
00-0 0000
--11 1111
--11 1111
0000 0000
1111 1111
xxxx xxxx
-000 ----
POR, BOD
Value on:
--uu uuuu
--uu uuuu
0000 0000
0000 0000
uuuu uuuu
00-0 0000
--11 1111
--11 1111
0000 0000
1111 1111
uuuu uuuu
-000 ----
Value on
all other
Resets