ATMEGA48PV-10AUR Atmel, ATMEGA48PV-10AUR Datasheet - Page 45
ATMEGA48PV-10AUR
Manufacturer Part Number
ATMEGA48PV-10AUR
Description
MCU AVR 4K FLASH 10MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48PV-10AUR
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.11
9.11.1
9.11.2
8025L–AVR–7/10
Register Description
SMCR – Sleep Mode Control Register
MCUCR – MCU Control Register
The Sleep Mode Control Register contains control bits for power management.
• Bits 7:4 – Reserved
These bits are unused bits in the ATmega48P/88P/168P, and will always read as zero.
• Bits 3:1 – SM[2:0]: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 9-2.
Note:
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see
on page
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
0x35 (0x55)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode is only recommended for use with external crystals or resonators.
40. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
Sleep Mode Select
R
7
–
0
R
7
–
0
SM1
0
0
1
1
0
0
1
1
BODS
R/W
6
0
R
6
–
0
BODSE
R/W
R
5
–
0
5
0
SM0
0
1
0
1
0
1
0
1
R
PUD
4
–
0
R/W
0
4
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
External Standby
SM2
R/W
3
0
ATmega48P/88P/168P
(1)
R
3
–
0
SM1
R/W
2
0
(1)
R
2
–
0
SM0
R/W
Table
IVSEL
1
0
R/W
1
0
9-2.
R/W
SE
IVCE
R/W
0
0
0
0
Table 9-1
MCUCR
SMCR
45
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