AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 51
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AT90PWM1-16MU
Manufacturer Part Number
AT90PWM1-16MU
Description
IC AVR PWM 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM1-16SU.pdf
(297 pages)
Specifications of AT90PWM1-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4378C–AVR–09/08
• Bit 6 - WDIE: Watchdog Interrupt Enable
When this bit is written to one and the I-bit in the Status Register is set, the Watchdog Interrupt is
enabled. If WDE is cleared in combination with this setting, the Watchdog Timer is in Interrupt
Mode, and the corresponding interrupt is executed if time-out in the Watchdog Timer occurs.
If WDE is set, the Watchdog Timer is in Interrupt and System Reset Mode. The first time-out in
the Watchdog Timer will set WDIF. Executing the corresponding interrupt vector will clear WDIE
and WDIF automatically by hardware (the Watchdog goes to System Reset Mode). This is use-
ful for keeping the Watchdog Timer security while using the interrupt. To stay in Interrupt and
System Reset Mode, WDIE must be set after each interrupt. This should however not be done
within the interrupt service routine itself, as this might compromise the safety-function of the
Watchdog System Reset mode. If the interrupt is not executed before the next time-out, a Sys-
tem Reset will be applied.
Table 9-5.
Note:
• Bit 4 - WDCE: Watchdog Change Enable
This bit is used in timed sequences for changing WDE and prescaler bits. To clear the WDE bit,
and/or change the prescaler bits, WDCE must be set.
Once written to one, hardware will clear WDCE after four clock cycles.
• Bit 3 - WDE: Watchdog System Reset Enable
WDE is overridden by WDRF in MCUSR. This means that WDE is always set when WDRF is
set. To clear WDE, WDRF must be cleared first. This feature ensures multiple resets during con-
ditions causing failure, and a safe start-up after the failure.
• Bit 5, 2..0 - WDP3..0: Watchdog Timer Prescaler 3, 2, 1 and 0
The WDP3..0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is run-
ning. The different prescaling values and their corresponding time-out periods are shown in
Table 9-6 on page
WDTON
0
0
0
0
1
1. For the WDTON Fuse “1” means unprogrammed while “0” means programmed.
(1)
Watchdog Timer Configuration
WDE
52.
0
0
1
1
x
WDIE
0
1
0
1
x
Mode
Stopped
Interrupt Mode
System Reset Mode
Interrupt and System Reset
Mode
System Reset Mode
Action on Time-out
None
Interrupt
Reset
Interrupt, then go to System
Reset Mode
Reset
AT90PWM1
51
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