ATMEGA16M1-AU Atmel, ATMEGA16M1-AU Datasheet - Page 139
ATMEGA16M1-AU
Manufacturer Part Number
ATMEGA16M1-AU
Description
IC MCU AVR 16K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA16M1-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
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Figure 17-7. Controlled Start and Stop Mechanism in Centered Mode
Note:
17.6
17.6.1
8209D–AVR–11/10
POCRnRB
POCRnSB
POCRnSA
PSC Counter
Run
PSCOUTnA
PSCOUTnB
See “PCTL – PSC Control Register” on page
Update of Values
Value Update Synchronization
To avoid unasynchronous and incoherent values in a cycle, if an update of one of several values
is necessary, all values are updated at the same time at the end of the cycle by the PSC. The
new set of values is calculated by sofware and the update is initiated by software.
Figure 17-8. Update at the end of complete PSC cycle.
The software can stop the cycle before the end to update the values and restart a new PSC
cycle.
New timing values or PSC output configuration can be written during the PSC cycle. Thanks to
LOCK configuration bit, the new whole set of values can be taken into account after the end of
the PSC cycle.
When LOCK configuration bit is set, there is no update. The update of the PSC internal registers
will be done at the end of the PSC cycle if the LOCK bit is released to zero.
The registers which update is synchronized thanks to LOCK are POC, POM2, POCRnSAH/L,
POCRnRAH/L, POCRnSBH/L and POCRnRBH/L.
See these register’s description starting on
Software
PSC
150.(PCCYC = 1)
Regulation Loop
Calculation
Cycle
With Set i
0
Cycle
With Set i
page
Cycle
With Set i
Writting in
PSC Registers
ATmega16M1/32M1/64M1
148.
Cycle
With Set i
End of Cycle
Request for
an Update
Cycle
With Set j
139
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