ATA6617-P3PW Atmel, ATA6617-P3PW Datasheet - Page 65
ATA6617-P3PW
Manufacturer Part Number
ATA6617-P3PW
Description
MCU W/LIN TX/5V REG/WTCDG 38VQFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6617-EK.pdf
(308 pages)
Specifications of ATA6617-P3PW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.6
4.6.1
9132D–AUTO–12/10
Power Management and Sleep Modes
Sleep Modes
• Bits 3:0 – CSEL3:0: Clock Source Select
CSEL bits are initialized with the values of CKSEL Fuse bits.
In case of ‘Enable/Disable Clock Source’, ‘Request for Clock Availability’ or ‘Clock Source
Switch’ command, CSEL field provides the code of the clock source. Refer to
page 49
In case of ‘Recover System Clock Source’ command, CSEL field contains the code of the
clock source used to drive the Clock Control Unit as described in
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR
sumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage dur-
ing the sleep periods. To further save power, it is possible to disable the BOD in some sleep
modes. See
Figure 4-10 on page 48
their distribution. The figure is helpful in selecting an appropriate sleep mode.
shows the different sleep modes, their wake up sources and BOD disable ability.
Table 4-16.
To enter any of the four sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, or Power-save) will be activated
by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File
and SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep
mode, the MCU wakes up and executes from the Reset Vector.
Notes:
Sleep Mode
Power-down
Power-Save
ADC Noise
Reduction
Idle
1. For INT1 and INT0, only level interrupt
and subdivisions of
“BOD Disable” on page 66
Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains
®
provides various sleep modes allowing the user to tailor the power con-
presents the different clock systems in the Atmel
X
Section 4.5.2 “Clock Sources” on page 49
Table 4-17 on page 70
X
X
X
X
X
for more details.
Oscillators
X
X
Atmel ATA6616/ATA6617
X
X
X
for a summary.
X
X
X
X
(1)
(1)
(1)
Wake-up Sources
X
X
Figure 4-10 on page
X
X
for clock source codes.
X
X
X
X
®
ATtiny87/167, and
X
X
X
X
X
X
X
Table 4-5 on
Table 4-16
X
48.
X
X
65
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