ATTINY44-15MZ Atmel, ATTINY44-15MZ Datasheet - Page 105
![MCU AVR 4K FLASH 15MHZ 20-QFN](/photos/12/32/123214/20-qfn-pc_sml.jpg)
ATTINY44-15MZ
Manufacturer Part Number
ATTINY44-15MZ
Description
MCU AVR 4K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY44-15MZ.pdf
(225 pages)
Specifications of ATTINY44-15MZ
Package / Case
20-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
12
Eeprom Size
256 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
256 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY44-15MZ
Manufacturer:
ATMEL
Quantity:
1 000
Part Number:
ATTINY44-15MZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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7701E–AVR–02/11
In non-inverting compare output mode, the output compare (OC1x) is cleared on the compare
match between TCNT1 and OCR1x, and set at bottom. In inverting compare output mode, out-
put is set on compare match and cleared at bottom.
Due to the single-slope operation, the operating frequency of the fast PWM mode can be twice
as high as the phase correct and phase and frequency correct PWM modes that use
dual-slope operation. This high frequency makes the fast PWM mode well suited for power
regulation, rectification, and DAC applications. High frequency allows the use of physically
smaller external components (coils, capacitors, etc.), and hence reduces total system cost.
The PWM resolution for fast PWM can be fixed to 8, 9, or 10 bits, or defined by either ICR1 or
OCR1A. The minimum resolution allowed is 2 bits (ICR1 or OCR1A set to 0x0003), and the
maximum resolution is 16 bits (ICR1 or OCR1A set to MAX). The PWM resolution in bits can
be calculated by using the following equation:
:
In fast PWM mode the counter is incremented until the counter value matches either one of
the fixed values 0x00FF, 0x01FF, or 0x03FF (WGM13:0 = 5, 6, or 7), the value in ICR1
(WGM13:0 = 14), or the value in OCR1A (WGM13:0 = 15). The counter is then cleared at the
following timer clock cycle. The timing diagram for the fast PWM mode is shown in
on page
The TCNT1 value in the timing diagram is shown as a histogram for illustrating the sin-
gle-slope operation. The diagram includes non-inverted and inverted PWM outputs. The small
horizontal lines on the TCNT1 slopes represent compare matches between OCR1x and
TCNT1. The OC1x interrupt flag will be set when a compare match occurs.
Figure 14-7. Fast PWM Mode, Timing Diagram
The timer/counter overflow flag (TOV1) is set each time the counter reaches top. In addition,
the OC1A or ICF1 flag is set on the same timer clock cycle on which TOV1 is set when either
OCR1A or ICR1 is used for defining the top value. If one of the interrupts are enabled, the
interrupt handler routine can be used for updating the top and compare values.
TCNTn
OCnx
OCnx
Period
105. The figure shows fast PWM mode when OCR1A or ICR1 is used to define top.
1
2
Atmel ATtiny24/44/84 [Preliminary]
3
R
FPWM
4
=
5
log
---------------------------------- -
6
log
TOP
2
7
+
1
8
OCRnx/TOP Update and
TOVn Interrupt Flag Set and
OCnA Interrupt Flag Set
or ICFn Interrupt Flag Set
(Interrupt on TOP)
(COMnx1:0 = 2)
(COMnx1:0 = 3)
Figure 14-7
105
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