ATTINY44-15MZ Atmel, ATTINY44-15MZ Datasheet - Page 26
![MCU AVR 4K FLASH 15MHZ 20-QFN](/photos/12/32/123214/20-qfn-pc_sml.jpg)
ATTINY44-15MZ
Manufacturer Part Number
ATTINY44-15MZ
Description
MCU AVR 4K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY44-15MZ.pdf
(225 pages)
Specifications of ATTINY44-15MZ
Package / Case
20-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
12
Eeprom Size
256 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
256 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY44-15MZ
Manufacturer:
ATMEL
Quantity:
1 000
Part Number:
ATTINY44-15MZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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7.1.4
7.2
7.3
26
Clock Sources
Default Clock Source
Atmel ATtiny24/44/84 [Preliminary]
ADC Clock – clk
ADC
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O
clocks in order to reduce noise generated by their digital circuitry. This gives more accurate
ADC conversion results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the Atmel
routed to the appropriate modules.
Table 7-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from power-down or power-save, the selected clock source is used to time the
start-up, ensuring stable oscillator operation before instruction execution starts. When the
CPU starts from reset, there is an additional delay allowing the power to reach a stable level
before commencing normal operation. The watchdog oscillator is used for timing this real-time
part of the start-up time. The number of WDT oscillator cycles used for each time-out is shown
in
Table 7-2.
The device is shipped with CKSEL = “0010”, SUT = “10”, and CKDIV8 programmed. The
default clock source setting is therefore the Internal RC Oscillator running at 8.0MHz with lon-
gest start-up time and an initial system clock prescaling of 8, resulting in 1.0MHz system clock.
This default setting ensures that all users can make their desired clock source setting using an
In-System or High-voltage Programmer.
Device Clocking Option
External Clock
Calibrated Internal RC Oscillator 8.0MHz
Watchdog Oscillator 128kHz
External Low-frequency Oscillator
External Crystal/Ceramic Resonator
Reserved
Table 7-2 on page
1. For all fuses “1” means unprogrammed while “0” means programmed.
Typ Time-out
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
64ms
4ms
26.
(1)
Number of Cycles
8K (8,192)
®
512
AVR
0101, 0111, 0011,0001
®
clock generator, and
CKSEL3..0
1000-1111
0000
0010
0100
0110
7701E–AVR–02/11
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