AT32UC3L016-ZAUT Atmel, AT32UC3L016-ZAUT Datasheet - Page 381
AT32UC3L016-ZAUT
Manufacturer Part Number
AT32UC3L016-ZAUT
Description
IC MCU AVR32 16KB FLASH 48VQFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3L-EK.pdf
(858 pages)
Specifications of AT32UC3L016-ZAUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.62 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (13Mb)
19.6.5
19.6.5.1
19.6.5.2
19.6.5.3
19.6.5.4
32099F–11/2010
LIN Mode
Modes of operation
Receiver and Transmitter Control
Character Transmission
Character Reception
The LIN Mode provides Master node and Slave node connectivity on a LIN bus.
The LIN (Local Interconnect Network) is a serial communication protocol which efficiently sup-
ports the control of mechatronic nodes in distributed automotive applications.
The main properties of the LIN bus are:
LIN provides cost efficient bus communication where the bandwidth and versatility of CAN are
not required.
The LIN Mode enables processing LIN frames with a minimum of action from the
microprocessor.
The USART can act either as a LIN Master node or as a LIN Slave node.
The node configuration is chosen by setting the MODE field in the Mode Register (MR):
In order to avoid unpredicted behavior, any change of the LIN node configuration must be fol-
lowed by a software reset of the transmitter and of the receiver (except the initial node
configuration after a hardware reset). (See
See Section “19.6.2” on page 365.
See Section “19.6.3.1” on page 365.
See Section “19.6.3.4” on page 368.
• Single Master/Multiple Slaves concept
• Low cost silicon implementation based on common UART/SCI interface hardware, an
• Self synchronization without quartz or ceramic resonator in the slave nodes
• Deterministic signal transmission
• Low cost single-wire implementation
• Speed up to 20 kbit/s
• LIN Master Node (MODE=0xA)
• LIN Slave Node (MODE=0xB)
equivalent in software, or as a pure state machine.
Section
19.6.5.2)
AT32UC3L016/32/64
381
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