AT32UC3L016-ZAUT Atmel, AT32UC3L016-ZAUT Datasheet - Page 516
AT32UC3L016-ZAUT
Manufacturer Part Number
AT32UC3L016-ZAUT
Description
IC MCU AVR32 16KB FLASH 48VQFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3L-EK.pdf
(858 pages)
Specifications of AT32UC3L016-ZAUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.62 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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• SWRST: Software Reset
• STREN: Clock Stretch Enable
• GCMATCH: General Call Address Match
• SMATCH: Slave Address Match
• SMEN: SMBus Mode Enable
• SEN: Slave Enable
32099F–11/2010
This bit will always read as 0.
Writing a zero to this bit has no effect.
Writing a one to this bit resets the TWIS.
Writing this bit to zero disables clock stretching if RHR/THR buffer full/empty. May cause over/underrun.
Writing this bit to one enables clock stretching if RHR/THR buffer full/empty.
Writing this bit to zero causes TWIS not to acknowledge the General Call Address.
Writing this bit to one causes TWIS to acknowledge the General Call Address.
Writing this bit to zero causes TWIS not to acknowledge the Slave Address.
Writing this bit to one causes TWIS to acknowledge the Slave Address.
Writing this bit to zero disables SMBus mode.
Writing this bit to one enables SMBus mode.
Writing this bit to zero disables the slave interface.
Writing this bit to one enables the slave interface.
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