ATMEGA325PV-10MU Atmel, ATMEGA325PV-10MU Datasheet - Page 89
ATMEGA325PV-10MU
Manufacturer Part Number
ATMEGA325PV-10MU
Description
IC MCU AVR 32K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA3250P-20AU.pdf
(364 pages)
Specifications of ATMEGA325PV-10MU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, UART, USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA325PV-8MU
ATMEGA325PV-8MU
ATMEGA325PV-8MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA325PV-10MU
Manufacturer:
ATMEL
Quantity:
3 500
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14. 8-bit Timer/Counter0 with PWM
14.1
14.2
14.2.1
8023F–AVR–07/09
Features
Overview
Registers
•
•
•
•
•
•
•
Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram of the 8-bit Timer/Counter is shown in
of I/O pins, refer to
CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-
specific I/O Register and bit locations are listed in the
Figure 14-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers. Inter-
rupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt
Flag Register (TIFR0). All interrupts are individually masked with the Timer Interrupt Mask Reg-
ister (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
Timer/Counter
TCNTn
OCRn
”Pinout ATmega3250P” on page 2
=
direction
count
clear
BOTTOM
= 0
Control Logic
=
TCCRn
TOP
0xFF
clk
”Register Description” on page
Tn
and
ATmega325P/3250P
Figure
Generation
Waveform
”Pinout ATmega325P” on page
Clock Select
( From Prescaler )
Detector
14-1. For the actual placement
Edge
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
102.
T0
).
89
3.
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