ATMEGA169PV-8AUR Atmel, ATMEGA169PV-8AUR Datasheet - Page 142
ATMEGA169PV-8AUR
Manufacturer Part Number
ATMEGA169PV-8AUR
Description
MCU AVR 16KB FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA169PV-8AU.pdf
(395 pages)
Specifications of ATMEGA169PV-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
54
Interface Type
SPI/USART/USI
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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17.5
8018P–AVR–08/10
Compare Match Output Unit
The setup of the OC2A should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC2A value is to use the Force Output Com-
pare (FOC2A) strobe bit in Normal mode. The OC2A Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM2A1:0 bits are not double buffered together with the compare value.
Changing the COM2A1:0 bits will take effect immediately.
The Compare Output mode (COM2A1:0) bits have two functions. The Waveform Generator
uses the COM2A1:0 bits for defining the Output Compare (OC2A) state at the next compare
match. Also, the COM2A1:0 bits control the OC2A pin output source.
plified schematic of the logic affected by the COM2A1:0 bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-
ters (DDR and PORT) that are affected by the COM2A1:0 bits are shown. When referring to the
OC2A state, the reference is for the internal OC2A Register, not the OC2A pin.
Figure 17-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2A) from the Waveform
Generator if either of the COM2A1:0 bits are set. However, the OC2A pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC2A pin (DDR_OC2A) must be set as output before the OC2A value is vis-
ible on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2A state before the
output is enabled. Note that some COM2A1:0 bit settings are reserved for certain modes of
operation.
COMnx1
COMnx0
FOCnx
clk
I/O
See ”8-bit Timer/Counter Register Description” on page 153.
Waveform
Generator
D
D
PORT
D
DDR
OCnx
Q
Q
Q
1
0
Figure 17-4
ATmega169P
shows a sim-
OCnx
Pin
142
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