ATMEGA64M1-AU Atmel, ATMEGA64M1-AU Datasheet - Page 218
ATMEGA64M1-AU
Manufacturer Part Number
ATMEGA64M1-AU
Description
IC MCU AVR 64K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64M1-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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20.6.3
218
ATmega16M1/32M1/64M1
LINENIR – LIN Enable Interrupt Register
• Bit 2 - LIDOK: Identifier Interrupt
• Bit 1 - LTXOK: Transmit Performed Interrupt
• Bit 0 - LRXOK: Receive Performed Interrupt
• Bits 7:4 - Res: Reserved
• Bit 3 - LENERR: Enable Error Interrupt
• Bit 2 - LENIDOK: Enable Identifier Interrupt
Bit
Read/Write
Initial Value
resets all LINERR bits.
written to zero when LINENIR is written.
– 0 = No identifier
– 1 = Slave task: Identifier present, master task: Tx Header complete
– 0 = No Tx
– 1 = Tx Response complete
– 0 = No Rx
– 1 = Rx Response complete
– 0 = Error interrupt masked
– 1 = Error interrupt enabled
– 0 = Identifier interrupt masked
– 1 = Identifier interrupt enabled
The user clears this bit by writing 1 in order to reset this interrupt. Resetting LERR also
In UART mode, this bit is also cleared by reading LINDAT.
This bit generates an interrupt if its respective enable bit - LENIDOK - is set in LINENIR.
The user clears this bit by writing 1, in order to reset this interrupt.
This bit generates an interrupt if its respective enable bit - LENTXOK - is set in LINENIR.
The user clears this bit by writing 1, in order to reset this interrupt.
In UART mode, this bit is also cleared by writing LINDAT.
This bit generates an interrupt if its respective enable bit - LENRXOK - is set in LINENIR.
The user clears this bit by writing 1, in order to reset this interrupt.
In UART mode, this bit is also cleared by reading LINDAT.
These bits are reserved for future use. For compatibility with future devices, they must be
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
-
LENERR
R/W
3
0
LENIDOK
R/W
2
0
LENTXOK
R/W
1
0
LENRXOK
R/W
0
0
8209D–AVR–11/10
LINENIR
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