PIC16C65B-20I/L Microchip Technology, PIC16C65B-20I/L Datasheet - Page 44
PIC16C65B-20I/L
Manufacturer Part Number
PIC16C65B-20I/L
Description
IC MCU OTP 4KX14 PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C63A-04SP.pdf
(184 pages)
3.PIC16C63A-04SP.pdf
(10 pages)
4.PIC16C63A-04SP.pdf
(10 pages)
5.PIC16C65B-04P.pdf
(7 pages)
Specifications of PIC16C65B-20I/L
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
33
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC16C
No. Of I/o's
33
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C65B-20I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F818-ISO PDF datasheet
- PIC16C63A-04SP PDF datasheet #2
- PIC16C63A-04SP PDF datasheet #3
- PIC16C63A-04SP PDF datasheet #4
- PIC16C65B-04P PDF datasheet #5
- Current page: 44 of 184
- Download datasheet (3Mb)
PIC16C63A/65B/73B/74B
7.1
Timer mode is selected by clearing the TMR1CS
(T1CON<1>) bit. In this mode, the input clock to the
timer is F
(T1CON<2>) has no effect since the internal clock is
always in sync.
FIGURE 7-1:
DS30605C-page 44
Note 1: When the T1OSCEN bit is cleared, the inverter is turned off. This eliminates power drain.
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
Timer1 Operation in Timer Mode
OSC
2: For the PIC16C65B/73B/74B, the Schmitt Trigger is not implemented in External Clock mode.
/4. The synchronize control bit T1SYNC
Set Flag bit
TMR1IF on
Overflow
TIMER1 BLOCK DIAGRAM
(2)
TMR1H
T1OSC
TMR1
TMR1L
Oscillator
Enable
T1OSCEN
(1)
(2)
Internal
Clock
F
OSC
/4
TMR1ON
7.2
Counter mode is selected by setting bit TMR1CS. In
this mode, the timer increments on every rising edge of
clock input on pin RC1/T1OSI/CCP2, when bit
T1OSCEN is set, or on pin RC0/T1OSO/T1CKI, when
bit T1OSCEN is cleared.
If T1SYNC is cleared, then the external clock input is
synchronized with internal phase clocks. The synchro-
nization is done after the prescaler stage. The
prescaler stage is an asynchronous ripple counter.
In this configuration during SLEEP mode, Timer1 will
not increment even if the external clock is present,
since the synchronization circuit is shut-off. The
prescaler, however, will continue to increment.
On/Off
TMR1CS
1
0
Timer1 Operation in Synchronized
Counter Mode
T1CKPS1:T1CKPS0
T1SYNC
Prescaler
1, 2, 4, 8
0
1
2
2000 Microchip Technology Inc.
Synchronized
Clock Input
Synchronize
SLEEP Input
det
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