PIC18F2480-I/SP Microchip Technology, PIC18F2480-I/SP Datasheet - Page 297
PIC18F2480-I/SP
Manufacturer Part Number
PIC18F2480-I/SP
Description
IC PIC MCU FLASH 8KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18F4480-IPT.pdf
(8 pages)
5.PIC18F4480-IPT.pdf
(6 pages)
6.PIC18F4480-IPT.pdf
(6 pages)
7.PIC18LF2480-ISP.pdf
(14 pages)
8.PIC18F2580-ESO.pdf
(483 pages)
Specifications of PIC18F2480-I/SP
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/MSSP/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2480-I/SP
Manufacturer:
TDK
Quantity:
64
Part Number:
PIC18F2480-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18F4480-IPT PDF datasheet #4
- PIC18F4480-IPT PDF datasheet #5
- PIC18F4480-IPT PDF datasheet #6
- PIC18LF2480-ISP PDF datasheet #7
- PIC18F2580-ESO PDF datasheet #8
- Current page: 297 of 483
- Download datasheet (9Mb)
REGISTER 23-23: BnCON: TX/RX BUFFER n CONTROL REGISTERS IN TRANSMIT MODE
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
TXBIF
R/W-0
2:
3:
4:
5:
(3)
These registers are available in Mode 1 and 2 only.
Clearing this bit in software while the bit is set will request a message abort.
This bit is automatically cleared when TXREQ is set.
While TXREQ is set or transmission is in progress, transmit buffer registers remain read-only.
These bits set the order in which the transmit buffer will be transferred. They do not alter the CAN
message identifier.
TXBIF: Transmit Buffer Interrupt Flag bit
1 = A message is successfully transmitted
0 = No message was transmitted
TXABT: Transmission Aborted Status bit
1 = Message was aborted
0 = Message was not aborted
TXLARB: Transmission Lost Arbitration Status bit
1 = Message lost arbitration while being sent
0 = Message did not lose arbitration while being sent
TXERR: Transmission Error Detected Status bit
1 = A bus error occurred while the message was being sent
0 = A bus error did not occur while the message was being sent
TXREQ: Transmit Request Status bit
1 = Requests sending a message; clears the TXABT, TXLARB and TXERR bits
0 = Automatically cleared when the message is successfully sent
RTREN: Automatic Remote Transmission Request Enable bit
1 = When a remote transmission request is received, TXREQ will be automatically set
0 = When a remote transmission request is received, TXREQ will be unaffected
TXPRI1:TXPRI0: Transmit Priority bits
11 = Priority Level 3 (highest priority)
10 = Priority Level 2
01 = Priority Level 1
00 = Priority Level 0 (lowest priority)
TXABT
R-0
[0 ≤ n ≤ 5, TXnEN (BSEL0<n>) = 1]
(3)
W = Writable bit
‘1’ = Bit is set
TXLARB
R-0
(3)
PIC18F2480/2580/4480/4580
TXERR
R-0
Preliminary
(2,4)
(3)
(5)
(3)
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TXREQ
R/W-0
(1)
(3)
(3)
(2,4)
RTREN
R/W-0
x = Bit is unknown
TXPRI1
R/W-0
DS39637C-page 295
(5)
TXPRI0
R/W-0
bit 0
(5)
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