AT90USB1287-MU Atmel, AT90USB1287-MU Datasheet - Page 109
AT90USB1287-MU
Manufacturer Part Number
AT90USB1287-MU
Description
IC AVR MCU 128K 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet
1.AT90USB646-MU.pdf
(461 pages)
Specifications of AT90USB1287-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64QFN EP
Device Core
AVR
Family Name
AT90
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB1287-16MU
AT90USB1287-16MU
AT90USB1287-16MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90USB1287-MU
Manufacturer:
KEMET
Quantity:
30 000
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13.7
7593K–AVR–11/09
Timer/Counter Timing Diagrams
one allows the OC0A pin to toggle on Compare Matches if the WGM02 bit is set. This option is
not available for the OC0B pin (See
be visible on the port pin if the data direction for the port pin is set as output. The PWM wave-
form is generated by clearing (or setting) the OC0x Register at the Compare Match between
OCR0x and TCNT0 when the counter increments, and setting (or clearing) the OC0x Register at
Compare Match between OCR0x and TCNT0 when the counter decrements. The PWM fre-
quency for the output when using phase correct PWM can be calculated by the following
equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
The extreme values for the OCR0A Register represent special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCR0A is set equal to BOTTOM, the
output will be continuously low and if set equal to MAX the output will be continuously high for
non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
At the very start of period 2 in
there is no Compare Match. The point of this transition is to guarantee symmetry around BOT-
TOM. There are two cases that give a transition without Compare Match.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
shows the count sequence close to the MAX value in all modes other than phase correct PWM
mode.
Figure 13-8. Timer/Counter Timing Diagram, no Prescaling
Figure 13-9
• OCR0A changes its value from MAX, like in
• The timer starts counting from a value higher than the one in OCR0A, and for that reason
OCn pin value is the same as the result of a down-counting Compare Match. To ensure
symmetry around BOTTOM the OCn value at MAX must correspond to the result of an up-
counting Compare Match.
misses the Compare Match and hence the OCn change that would have happened on the
way up.
TCNTn
(clk
TOVn
clk
clk
I/O
I/O
Tn
/1)
shows the same timing data, but with the prescaler enabled.
Figure 13-8
MAX - 1
contains timing data for basic Timer/Counter operation. The figure
Figure 13-7
f
Table 13-3 on page
OCnxPCPWM
OCnx has a transition from high to low even though
MAX
Figure
=
----------------- -
N 510
f
clk_I/O
13-7. When the OCR0A value is MAX the
⋅
111). The actual OC0x value will only
BOTTOM
AT90USB64/128
T0
) is therefore shown as a
BOTTOM + 1
109
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